DM548: Computer architecture and system programming
Study Board of Science
Teaching language: English, Danish or English depending on the teacher, but English if international students are enrolled
EKA: N330005112, N330005102
Assessment: Second examiner: None, Second examiner: External
Grading: Pass/Fail, 7-point grading scale
Offered in: Odense
Offered in: Autumn
Level: Bachelor
STADS ID (UVA): N330005101
ECTS value: 10
Date of Approval: 25-04-2019
Duration: 1 semester
Version: Archive
Comment
Entry requirements
Academic preconditions
The content of DM536 Introduction to Programming should be known.
The course cannot be followed if you have passed DM544 Computer Architecture, or if you have DM544 mandatory in your curriculum.
Course introduction
The course introduces the student to the architecture of general purpose computers, from the logic level over the microprogramming level to the conventional ISA level; also major components in the storage hierarchy, bus architectures and the organization of pipelined CPU's are presented. In addition, the main aspects of a system programming language are introduced.
The course builds on DM550, DM519, and DM507 and gives a professional basis for DM510 and DM546.
- In relation to the learning outcomes of the degree the course has explicit focus on:
- knowledge of principles for the construction of computer hardware and operating systems, including distributed and parallel systems
- to understand basic logic diagrams, and to express the functionality of basic CPU components in terms of such diagrams.
- to express the functionality of an ISA level instruction by interpretation on an underlying (micro)architecture.
- to be able to interpret ordinary binary integer and floating point number representations, and to be able to convert between these.
- to know and be able to explain the properties and limitations of the different storage components, including their addressing, and to evaluate the performance of a multi-level storage hierarchy.
- to be able to explain and discuss the exploitation of parallelism in the form of pipelining, their limitations, and the distribution of tasks on multiple functional units.
- to be able to explain and discuss the internal organization and internal communication paths at a high level, including communication with external units and interrupts from these.
- to express the functionality of a given algorithm as an assembler program, including to bring such a program to execution on a specific machine.
- to express the functionality of a given algorithm as a system program, including to bring such a program to execution on a specific machine.
Expected learning outcome
The learning objectives of the course are that the student demonstrates the ability to:
- interpret elementary logic diagrams and truth tables, as well as demonstrating the functionality of the basic CPU components in form of such diagrams and tables, especially to take advantage of recursive definitions to minimize the longest path.
- express the functionality of an ISA level instruction in the interpretation of an underlying (micro) machine architecture.
- interpret ordinary binary integer and floating point representations, and to convert between these.
- explain the characteristics and limitations of the different storage components, including the addressing structure, and assess the performance of a multi-level storage hierarchy.
- explain and discuss modern CPUs internal use of parallelism in the form of pipelining, restricting use and distribution of tasks on multiple functional units.
- explain and discuss the internal organization and internal communication paths at a high level, including communication with external devices as well as interruptions from these.
- to express the functionality of a given algorithm as an assembler program, including to bring such a program to execution on a specific machine.
- to express the functionality of a given algorithm as a system program, including to bring such a program to execution on a specific machine
Content
The following main topics are contained in the course:
- The digital logic level and microprogramming level, including pipelining, cache memories and other performance improving features.
- The ISA level instruction types, formats and addressing methods, data types and number representations, assembler programming and virtual memories.
- A system programming language, including: variables and operators, functions, pointers, recursion, I/O, and basic data structures.
Literature
Examination regulations
Prerequisites for participating in the exam a)
Timing
Autumn
Tests
Two mandatory projects
EKA
N330005112
Assessment
Second examiner: None
Grading
Pass/Fail
Identification
Full name and SDU username
Language
Normally, the same as teaching language
Examination aids
To be announced during the course
ECTS value
0
Additional information
The prerequisite examination is a prerequisite for participation in exam element a)
Exam element a)
Timing
January
Prerequisites
| Type | Prerequisite name | Prerequisite course |
|---|---|---|
| Examination part | Prerequisites for participating in the exam a) | N330005101, DM548: Computer architecture and system programming |
Tests
Written exam
EKA
N330005102
Assessment
Second examiner: External
Grading
7-point grading scale
Identification
Full name and SDU username
Language
Normally, the same as teaching language
Examination aids
Allowed, a closer description of the exam rules will be posted under 'Course Information' on Blackboard.
ECTS value
10
Additional information
The examination form for re-examination may be different from the exam form at the regular exam.
Indicative number of lessons
Teaching Method
At the faculty of science, teaching is organized after the three-phase model ie. intro, training and study phase.