DM548: Computer architecture and system programming

Study Board of Science

Teaching language: Danish or English depending on the teacher, but English if international students are enrolled
EKA: N330005102
Assessment: Second examiner: External
Grading: 7-point grading scale
Offered in: Odense
Offered in: Autumn
Level: Bachelor

STADS ID (UVA): N330005101
ECTS value: 10

Date of Approval: 14-03-2022


Duration: 1 semester

Version: Approved - active

Entry requirements

The course cannot be chosen if you have passed, registered, or have followed DM588: Computer architecture (7,5 ECTS), or if DM588: Computer architecture (7,5 ECTS) is a constituent part of your Curriculum.

Academic preconditions

The content of DM550. Introduction to Programming (10 ECTS) should be known.

Course introduction

The course introduces the student to the architecture and organization of general purpose computers, from the logic level over the microprogramming level to the conventional ISA level. Major components in the storage hierarchy, interconnection structures, and the organization of pipelined processors are also presented. In addition, the foundational aspects of system programming are introduced.

The course builds on competences in programming, concurrent programming, algorithms, and data structures, and gives a professional basis for developing competences in in operating systems, networks and security, compiler construction, and further system programming.

In relation to the learning outcomes of the degree the course has explicit focus on:

  • knowledge of principles for the construction of computer hardware and operating systems, including distributed and parallel systems.
  • developing skills in programming in different types of programming languages.
  • developing skills in constructing larger software systems.
  • developing skills in deciding and justifying professional decisions.
  • developing skills in describing, formulating and disseminating problems and results to either other professional or non-specialists or collaborative partners and users.
  • giving the competence to handle complex and development-oriented situations in study and work contexts.
  • giving the competence to identify one's own needs for learning and structure one's own learning in different learning environments.

Expected learning outcome

After the course the student is expected to have the following.

Knowledge of

  • ordinary integer and floating-point number representations.
  • the architecture of computers in terms of abstraction layers.
  • digital logic and Boolean algebra.
  • microarchitectures and the use of parallelism in modern processors.
  • multicore and distributed architectures.
  • instruction set architectures.
  • assembly languages, including system calls.
  • the organization of hardware components (processors, memory, communication paths, external devices, etc.)
  • I/O devices and interrupts.
  • the characteristics and limitations of the different storage components, including the addressing structure.
Skills in
  • interpreting basic logic diagrams and truth tables, and express the functionality of basic processor components in terms of such diagrams and tables.
  • interpreting ordinary binary integer and floating-point number representations, and conversion between these.
  • expressing the functionality of an ISA level instruction by interpretation on an underlying (micro)architecture.
  • designing and implementing simple programs in an assembly language.
  • designing and implementing programs in a system programming language.
Competences in
  • assessing the performance of a multi-level storage hierarchy.
  • explaining and discussing the exploitation of parallelism in modern processors, including the use of pipelining, out-of-order execution, and the distribution of tasks on multiple functional units.
  • explain and discuss the internal organization and internal communication paths at a high level, including communication with external devices as well as interruptions from these.
  • assessing the practical performance of algorithms.
  • obtaining further knowledge of computer architecture.

Content

The following main topics are contained in the course.

  • The digital logic level and microarchitecture level, including pipelining, cache memories, and other performance improving features.
  • The ISA level instruction types, formats and addressing methods, data types and number representations, and in addition assembly programming.
  • Organization of computer components and their interconnection.
  • A system programming language, including variables and operators, functions, pointers and memory handling, recursion, I/O, and basic data structures.

Literature

See itslearning for syllabus lists and additional literature references.

Examination regulations

Exam element a)

Timing

Autumn and January

Tests

Portfolio and tests

EKA

N330005102

Assessment

Second examiner: External

Grading

7-point grading scale

Identification

Full name and SDU username

Language

Normally, the same as teaching language

Duration

Written exam 4 hours

Examination aids

All common aids are allowed e.g. books, notes, computer programmes which do not use internet etc.  

Internet is not allowed during the exam. However, you may visit the course site in itslearning to open system "DE-Digital Exam". If you wish to use course materials from itslearning, you must download the materials to your computer the day before the exam. During the exam you cannot be sure that all course materials is accessible in itslearning.     

ECTS value

10

Additional information

Portfolio cionsisting of: A number of assignments handed in during the course and a written exam (January). The final grade is given on the basis of an overall assessment of assignments and the written exam. The external examiner will be able to see the assignments. 

Indicative number of lessons

72 hours per semester

Teaching Method

At the faculty of science, teaching is organized after the three-phase model ie. intro, training and study phase.

    • Introphase: 42 hours
    • Training phase: 30 hours, of which, tutorial: 14 hours and laboratory exercises: 16 hours
    • Study phase: 32 hours

    Activities in the study phase: application of the acquired knowledge in projects.

    Teacher responsible

    Name E-mail Department
    Jakob Lykke Andersen jlandersen@imada.sdu.dk Algoritmer

    Timetable

    Administrative Unit

    Institut for Matematik og Datalogi (datalogi)

    Team at Educational Law & Registration

    NAT

    Offered in

    Odense

    Recommended course of study

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    Transition rules

    Transitional arrangements describe how a course replaces another course when changes are made to the course of study. 
    If a transitional arrangement has been made for a course, it will be stated in the list. 
    See transitional arrangements for all courses at the Faculty of Science.