DM588: Computer architecture
Comment
Entry requirements
Academic preconditions
The content of DM536. Introduction to Programming should be known.
The course builds on competences in programming, concurrent programming, algorithms, and data structures, and gives a professional basis for developing competences in in operating systems, networks and security, compiler construction, and further system programming.
Course introduction
The course introduces the student to the architecture and organization of general purpose computers, from the logic level over the microprogramming level to the conventional ISA level. Major components in the storage hierarchy, interconnection structures, and the organization of pipelined processors are also presented. In addition, the foundational aspects of system programming are introduced.
Expected learning outcome
After the course the student is expected to have the following.
Knowledge of
- ordinary integer and floating-point number representations.
- the architecture of computers in terms of abstraction layers.
- digital logic and Boolean algebra.
- microarchitectures and the use of parallelism in modern processors.
- multicore and distributed architectures.
- instruction set architectures.
- assembly languages, including system calls.
- the organization of hardware components (processors, memory, communication paths, external devices, etc.)
- I/O devices and interrupts.
- the characteristics and limitations of the different storage components, including the addressing structure.
Skills in
- interpreting basic logic diagrams and truth tables, and express the functionality of basic processor components in terms of such diagrams and tables.
- interpreting ordinary binary integer and floating-point number representations, and conversion between these.
- expressing the functionality of an ISA level instruction by interpretation on an underlying (micro)architecture.
- designing and implementing simple programs in an assembly language.
Competences in
- assessing the performance of a multi-level storage hierarchy.
- explaining and discussing the exploitation of parallelism in modern processors, including the use of pipelining, out-of-order execution, and the distribution of tasks on multiple functional units.
- explain and discuss the internal organization and internal communication paths at a high level, including communication with external devices as well as interruptions from these.
- assessing the practical performance of algorithms.
- obtaining further knowledge of computer architecture.
Content
The following main topics are contained in the course.
- The digital logic level and microarchitecture level, including pipelining, cache memories, and other performance improving features.
- The ISA level instruction types, formats and addressing methods, data types and number representations, and in addition assembly programming.
- Organization of computer components and their interconnection.
Literature
Examination regulations
Exam element a)
Timing
Tests
Portfolio
EKA
Assessment
Grading
Identification
Language
Duration
Examination aids
All common aids are allowed e.g. books, notes, computer programmes which do not use internet etc.
ECTS value
Additional information
Indicative number of lessons
Teaching Method
Planned lessons:
Total number of planned lessons: 56
Hereof:
Common lessons in classroom/auditorium: 46
Common lessons in laboratory: 10
The common lessons are primarily lectures where topics and projects are introduced. The lessons there is room for discussion and questions.
In the team lessons in classroom the students are expected to have prepared by working on solving the announced exercises, and in the lessons the exercises are discussed.
In the team lessons in the laboratory the students can get help with solving announced programming exercises and projects.
Other planned teaching activities:
Studying material for the lectures, solving exercises, and application of the acquired knowledge and skills in projects.
Teacher responsible
| Name | Department | |
|---|---|---|
| Jakob Lykke Andersen | jlandersen@imada.sdu.dk | Institut for Matematik og Datalogi |